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dig:mic-servo [2011/03/22 14:56] – tobidig:mic-servo [2024/02/29 07:28] (current) – external edit 127.0.0.1
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 #  define EXAMPLE_TC_IRQ_GROUP        AVR32_TC_IRQ_GROUP #  define EXAMPLE_TC_IRQ_GROUP        AVR32_TC_IRQ_GROUP
 #  define EXAMPLE_TC_IRQ              AVR32_TC_IRQ0 #  define EXAMPLE_TC_IRQ              AVR32_TC_IRQ0
-#  define FPBA                        FOSC0 // chosen PBA clock frequency - set up to be same as cystral freq=12MHz 
 #define FADC 10000 // desired ADC sample rate in Hz #define FADC 10000 // desired ADC sample rate in Hz
 #define TC_CHANNEL    0 #define TC_CHANNEL    0
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 #define FOSC0           12000000                              //!< Osc0 frequency: Hz. #define FOSC0           12000000                              //!< Osc0 frequency: Hz.
 +#define FPBA (FOSC0*11/2/2) // from power manager clock setup = 33MHz
 +
 #define OSC0_STARTUP    AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC  //!< Osc0 startup time: RCOsc periods. #define OSC0_STARTUP    AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC  //!< Osc0 startup time: RCOsc periods.
 void init_clock() { void init_clock() {
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    .burst    = FALSE,                             // Burst signal selection.    .burst    = FALSE,                             // Burst signal selection.
    .clki     = FALSE,                             // Clock inversion.    .clki     = FALSE,                             // Clock inversion.
-   .tcclks   = TC_CLOCK_SOURCE_TC2                // Internal source clock 2, connected to fPBA/2=6MHz.+   .tcclks   = TC_CLOCK_SOURCE_TC2                // Internal source clock 2, connected to fPBA/2=15.5MHz.
  };  };
  
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  // Set the compare triggers for timer/counter (TC).  // Set the compare triggers for timer/counter (TC).
- // TC counter is 16-bits, with secondary main clock fPBA = 12 MHz. + // TC counter is 16-bits, with secondary main clock TIMER_CLOCK2 = FPBA clock/2  = 33 MHz/2=15.5MHz. 
- // Lowest possible freq is 12e6/2^16=183.1Hz.+ // Lowest possible freq is 15.5MHz/(2^16)=236Hz.
  // We want ADC sample rate of FADC Hz.  To get this, we load RC (Reset Counter) value so that  // We want ADC sample rate of FADC Hz.  To get this, we load RC (Reset Counter) value so that
- // TC reaches RC value every 1/FADC ms. Therefore we configure TC so that RC=FPBA/FADC. + // TC reaches RC value every 1/FADC s. Therefore we configure TC so that RC=FPBA/FADC. 
- // E.g., to get FADC=10kHz, we need RC=12e6/10000=1200.+ // E.g., to get FADC=10kHz, we need RC=15.5MHz/10000=1550. 
 + // The timer interrupt will then run at 10kHz (verfied on scope). 
 + // The timer interrupt for debug will toggle PA10 which will result in a square wave at 5kHz (verified).
  tc_write_rc(tc, TC_CHANNEL, (FPBA /2) / FADC); // Set RC value.  tc_write_rc(tc, TC_CHANNEL, (FPBA /2) / FADC); // Set RC value.
  
dig/mic-servo.txt · Last modified: 2024/02/29 07:28 by 127.0.0.1