CountingInDecimal_Lab9 Project Status (08/30/2009 - 16:58:01)
Project File: CountingInDecimal_Lab9.ise Implementation State: Synthesized
Module Name: CountingInDecimal
  • Errors:
No Errors
Target Device: xc3s100e-4cp132
  • Warnings:
14 Warnings (0 new)
Product Version:ISE 11.2
  • Routing Results:
 
Design Goal: Balanced
  • Timing Constraints:
 
Design Strategy: Xilinx Default (unlocked)
  • Final Timing Score:
  
 
Device Utilization Summary (estimated values) [-]
Logic UtilizationUsedAvailableUtilization
Number of Slices 34 960 3%
Number of Slice Flip Flops 38 1920 1%
Number of 4 input LUTs 69 1920 3%
Number of bonded IOBs 15 83 18%
Number of GCLKs 1 24 4%
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSun 30. Aug 16:57:27 2009014 Warnings (0 new)0
Translation ReportOut of DateSun 30. Aug 16:48:15 2009000
Map ReportOut of DateSun 30. Aug 16:48:33 2009002 Infos (0 new)
Place and Route ReportOut of DateSun 30. Aug 16:49:48 2009004 Infos (0 new)
Power Report     
Post-PAR Static Timing ReportOut of DateSun 30. Aug 16:50:05 2009003 Infos (0 new)
Bitgen ReportOut of DateSun 30. Aug 16:50:17 2009000
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 08/30/2009 - 16:58:02